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**82495XP/490XP Cache Controller / Cache RAM (for i860) 06/05/91
***Notes:...
***Info:...
***Features:...
**82496/491 Cache Controller / Cache RAM (for P5 Pentium) 03/22/93...
**82497/492 Cache Controller / Cache RAM (for P54 Pentium) <Nov94...
**82498/493 Cache Controller / Cache RAM (for P54 Pentium) <Nov94...
**
**Later chipsets (basic spec):
**440 series:...
**450NX (?) 06/29/98:...
**????? (Profusion) c:99...
**800 series...
*Headland/G2...
*HMC (Hulon Microelectronics)...
*Logicstar...
*Motorola...
*OPTi...
*PC CHIPS/Amptron/Atrend/ECS/Elpina/etc...
*SIS...
**540 (Spartan) Super7 2D/3D Ultra-AGP Single C.S.<11/30/99
***Info:
The single chipset, SiS540, provides a high performance/low cost
Desktop solution for the Super Socket 7 series CPUs based system by
integrating a high performance North Bridge, advanced hardware 2D/3D
GUI engine and Super-South bridge. In addition, SiS540 provides
system-on-chip solution that complies with Easy PC Initiative which
supports Instantly Available/OnNow PC technology, USB, Legacy Removal
and Slotless Design and FlexATX form factor.
By integrating the Ultra-AGP technology and advanced 128-bit graphic
display interface, SiS540 delivers high performance and up to 2 GB/s
memory bandwidth. Furthermore, SiS540 provides powerful slice layer
decoding DVD accelerator to improve the DVD playback performance. In
addition to providing the standard interface for CRT monitors, SiS540
also provides the Digital Flat Panel Port (DFP) for a standard
interface between a personal computer and a digital flat panel
monitor. To extend functionality and flexibility, SiS also provides
the "Video Bridge" (SiS301) to support the NTSC/PAL Video Output,
Digital LCD Monitor and Secondary CRT Monitor, which reduces the
external Panel Link transmitter and TV-Out encoder for cost effected
solution. SiS540 also adopts Share System Memory Architecture which
can flexibly utilize the frame buffer size up to 64MB.
The "Super-South Bridge" in SiS540 integrates all peripheral con-
trollers/accelerators/interfaces. SiS540 provides a total commun-
ication solution including 10/100Mb Fast Ethernet for Office
requirement. SiS540 offers AC’97 compliant interface that comprises
digital audio engine with 3D-hardware accelerator, on-chip sample rate
converter, and professional wavetable along with separate modem DMA
controller. SiS540 also provides interface to Low Pin Count (LPC)
operating at 33 MHz clock which is the same as PCI clock on the host,
and dual USB host controller with four USB ports that deliver better
connectivity and 2 x 12Mb bandwidth.
The built-in fast PCI IDE controller supports the ATA PIO/DMA, and the
Ultra DMA33/66 function that supports the data transfer rate up to 66
MB/s. It provides a separate data path for two IDE channels that can
eminently improve the performance under the multi-tasking environment.
***Configurations...
***Features:...
**55x SoC (System-on-chip) <03/14/02...
**
**Support chips:
**85C206 Integrated Peripheral Controller [no datasheet] ?...
**5595 Pentium PCI System I/O <12/24/97...
**950 LPC I/O <07/16/99...
**Other:...
**PII/III/Pro...
**Athlon etc...
*Symphony...
*TI (Texas Instruments)...
*UMC...
*Unresearched:...
*VIA...
**SL9252 80386SX System and Memory Controller <06/12/90
***Info:
VIA’s System and Memory Controller SL9252, has the logic for the
System Control, Memory Control, Data Control and chip select for some
of the peripherals used in an AT system. The device is fully
configurable via software. No external hardware jumpers are needed to
utilize its features. Default values are provided to boot any system
configuration. On reset, BIOS routines are used to program the device,
transparent to the user, to utilize its special features.
Four configuration registers in the System Control Logic control the
AT bus and peripheral bus Operations. Synchronous and asynchronous bus
operations are supported. In synchronous mode, bus clock is derived
from the processor's CLK2. In asynchronous mode, it is derived from an
independent external bus clock pin.
Support for page mode and non-page mode operation with non-interleave
or word / multi-page interleave, along with programmable memory
timing, allow the system designer to get maximum performance for the
chosen DRAMs. High drive for RAS, CAS, memory address, and write lines
are provided to connect SL9252 directly to a large DRAM memory array
without external buffering. In addition, CAS for all the banks in
non-interleave and 2-way interleave are provided to reduce external
gates.
Shadowing features are supported in 16K granularity from 640K to
1M. Remap options allow shadowing of eight different combinations of
top of memory, Local ROM, and Video ROM to 64oK to 1M region.
VIA's System and Memory Controller, SL9252, can be used with VIA's
SL9020 Data Controller, or with discrete latches and buffers. Data
direction and enable signals for the data controller are provided for
both modes of operation.
SL9252 provides decoding for the Real Time Clock and Keyboard
Controller, thus avoiding external decoding gates. In addition, Port B
logic, PS/2 Compatible Port 92 for fast reset, and A20GATE provide the
necessary logic support for a one-chip solution.
***Versions:...
***Features:...
**SL9350 80386DX Page Mode Memory Controller (16-25MHz 16MB) ?...
**SL9351 80386DX Page Interleave Memory Controller (33MHz) ?...
**SL9352 80386DX System and Memory Controller <06/12/90...
**SLXXXX Other chips...
**
**VT82C470 "Jupiter", Chip Set (w/o cache) 386 [no datasheet] ?
**VT82C475 "Jupiter", Chip Set (w/cache) 386 [no datasheet] ?
**VT82C486/2/3 "GMC chipset" [no datasheet, some info] ?...
**VT82C495/480 "Venus" Chip Set [no datasheet] ?
**VT82C495/491 ? EISA Chip Set [no datasheet, some info] <93...
**VT82C496G Pluto, Green PC 80486 PCI/VL/ISA System <05/30/94...
**VT82C530MV 3.3V Pentium chipset [no datasheet, some info]<05/30/94...
**VT82C570M Apollo Master, Green Pentium/P54C <06/22/95...
**VT82C580VP Apollo VP, Pentium/M1/K5 PCI/ISA System <02/15/96...
**VT82C580VPX Apollo VPX, VPX/97, Pentium with 66/75MHz Bus <01/09/97...
**VT82C590 Apollo VP2, VP2/97, Single-Chip Pentium 66MHz <01/10/97...
**VT82C597/AT Apollo VP3, Single-Chip for Pentium with AGP <10/03/97...
**VT82C598MVP Apollo MVP3,Single-Chip 66/75/83/100MHz & AGP <09/22/97...
**VT8501 Apollo MVP4,Single-Chip 66-100MHz & AGP <11/04/98...
**VT82C680 Apollo P6, Pentium-Pro Chip Set <08/30/96...
**Support chips:
**VT82C505 Pentium/486 VL to PCI Bridge <05/30/94...
**VT82C586/A/B PCI Integrated Peripheral Controller <10/13/96...
**VT82C596/A Mobile PCI Integrated Peripheral Controller <11/05/97...
**VT82C686A/B PCI Super-I/O Integrated Peripheral Ctrl. <02/10/98...
**Later P-Pro/II/III/Celeron...
**Later AMD...
**Other...
*VLSI...
*Western Digital...
*Winbond...
*ZyMOS...
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