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**82485       Turbo Cache (and 485Turbocache)                      c90
***Notes:...
***Info:...
***Versions:...
***Features:...
**82489DX       Advanced Programmable Interrupt Controller    10/12/92...
**82495DX/490DX DX CPU-Cache Chip Set                           <Sep91...
**82495XP/490XP Cache Controller / Cache RAM (for i860)       06/05/91...
**82496/491     Cache Controller / Cache RAM (for P5 Pentium) 03/22/93...
**82497/492   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**82498/493   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**
**Later chipsets (basic spec):
**440 series:...
**450NX  (?)            06/29/98:...
**?????  (Profusion)    c:99...
**800 series...
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**950        LPC I/O                                         <07/16/99
***Info:...
***Versions:...
***Features:...
**Other:...
**PII/III/Pro...
**Athlon etc...
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*Unresearched:...
*VIA...
**SL9251   80386SX Page Interleave Memory Controller         <04/13/90
***Info:
The SL9251  Memory Controller supports PC/AT systems  based on Intel's
80386SX microprocessor. It  is a member of VIA's  FlexSet family which
utilizes the  same core  logic across the  entire PC/AT  spectrum. The
SL9251 is backward compatible with existing memory controllers for the
80386SX (SL9250).  Boards designed using  the SL9250 can be  used with
the new SL9251 without modifications  and with existing BIOS. In order
to  take advantage  of the  SL9251's many  new  programmable features,
minor board modification and a  modified BIOS is required for enhanced
performance.

The SL9251  offers the advanced memory control  functions and features
needed  to  develop  high  performance  PC/AT  systems  without  using
external  TTL  Logic.  The  SL9251  supports  two-way  and 4-way  page
interleave mode for 80386SX  based designs. The Page interleave option
can  be enabled  or disabled  using the  configuration  registers. All
memory   banks  which   are   interleaved  use   the   same  type   of
memory. Designers can enable  the staggered RAS option during refresh,
which minimizes power surge.  Both pipeline and non-pipeline modes are
supported  by enabling  or disabling  the next  address  controls, and
providing ready at the correct time.

***Versions:...
***Features:...
**SL9252   80386SX System and Memory Controller              <06/12/90...
**SL9350   80386DX Page Mode Memory Controller (16-25MHz 16MB)       ?...
**SL9351   80386DX Page Interleave Memory Controller (33MHz)         ?...
**SL9352   80386DX System and Memory Controller              <06/12/90...
**SLXXXX   Other chips...
**
**VT82C470     "Jupiter", Chip Set (w/o cache) 386 [no datasheet]    ?
**VT82C475     "Jupiter", Chip Set (w/cache) 386   [no datasheet]    ?
**VT82C486/2/3 "GMC chipset"            [no datasheet, some info]    ?...
**VT82C495/480 "Venus" Chip Set                    [no datasheet]    ?
**VT82C495/491 ? EISA Chip Set          [no datasheet, some info]  <93...
**VT82C496G    Pluto, Green PC 80486 PCI/VL/ISA System       <05/30/94...
**VT82C530MV   3.3V Pentium chipset [no datasheet, some info]<05/30/94...
**VT82C570M    Apollo Master, Green Pentium/P54C             <06/22/95...
**VT82C580VP   Apollo VP,  Pentium/M1/K5 PCI/ISA System      <02/15/96...
**VT82C580VPX  Apollo VPX, VPX/97, Pentium with 66/75MHz Bus <01/09/97...
**VT82C590     Apollo VP2, VP2/97, Single-Chip Pentium 66MHz <01/10/97...
**VT82C597/AT  Apollo VP3, Single-Chip for Pentium with AGP  <10/03/97...
**VT82C598MVP  Apollo MVP3,Single-Chip 66/75/83/100MHz & AGP <09/22/97...
**VT8501       Apollo MVP4,Single-Chip 66-100MHz & AGP       <11/04/98...
**VT82C680     Apollo P6, Pentium-Pro Chip Set               <08/30/96...
**Support chips:
**VT82C505     Pentium/486 VL to PCI Bridge                  <05/30/94...
**VT82C586/A/B PCI Integrated Peripheral Controller          <10/13/96...
**VT82C596/A   Mobile PCI Integrated Peripheral Controller   <11/05/97...
**VT82C686A/B  PCI Super-I/O Integrated Peripheral Ctrl.     <02/10/98...
**Later P-Pro/II/III/Celeron...
**Later AMD...
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