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**82495XP/490XP Cache Controller / Cache RAM (for i860)       06/05/91
***Notes:...
***Info:...
***Features:...
**82496/491     Cache Controller / Cache RAM (for P5 Pentium) 03/22/93...
**82497/492   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**82498/493   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**
**Later chipsets (basic spec):
**440 series:...
**450NX  (?)            06/29/98:...
**?????  (Profusion)    c:99...
**800 series...
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*HMC (Hulon Microelectronics)...
*Logicstar...
**SL6012  Memory Mapper for PC-AT (74LS612 compatible)          <Jul87
***Info:
The SL6012 Memory  Mapper is intended for use in  PC-AT design. It can
expand an address bus by 4  bits. In PC-AT applications, 4 bits of the
source  address   are  used  to  select   1  of  16,   eight  bit  map
registers. These registers  are normally programmed (through software)
with the  starting address of each  memory page. The  register data is
output directly for  use as the most significant  bits of the expanded
address bus. The 8 bits from the SL6012 are used along with the unused
source address bits to form the expanded address bus.

As shown  in Table 1  [see datasheet], the  SL6012 has three  modes of
operation; read, write and map. Data may be written into, or read from
the Memory  Mapper when  chip select CSN  is low. The  register select
inputs (RS0 through RS3) select one of the sixteen map registers. When
RWN is  low, data is written  into a register from  the data bus. When
RWN is high  data is output from a Memory Mapper  register to the data
bus.

The map mode of operation is selected when chip select CSN is high. In
this mode, the  register data selected by the  map address inputs (MA0
through  MA3)  will be  available  on  the  map outputs  (MO0  through
MO7).  Note that  the map  registers are  addressed by  either  the RS
inputs or  the MA inputs depending  upon the operating  mode. When MEN
(Map Enable) is low the map  outputs (MO0-MO7) are active. When MEN is
high, the map outputs are at high impedance.

***Versions:...
***Features:...
**SL9010  System Controller (80286/80386SX/DX, 16/20/25MHz)     <oct88...
**SL9020  Data Controller                                       <oct88...
**SL9025  Address Controller                                    <oct88...
**SL9090  Universal PC/AT Clock Chip                            <oct88...
**SL9250  Page Mode Memory Controller (16/20MHz 8MB Max)        <oct88...
**SL9350  Page Mode Memory Controller (16/20/25MHz 16MB Max)    <oct88...
**Other:...
*Motorola...
*OPTi...
*PC CHIPS/Amptron/Atrend/ECS/Elpina/etc...
*SIS...
*Symphony...
*TI (Texas Instruments)...
*UMC...
**UM82152      Cache Controller (AUStek A38152 clone)              <91
***Info:
The  UM82152 is a  high-performance cache  controller for  Intel 80386
based   systems  and   provides   high  levels   of  integration   and
functionality.  It interfaces  directly  to the  80386; no  additional
support  logic  is required.   A  complete  32-kilobyte  cache can  be
designed with just one UM82152 and four 8K by 8-bit static RAMs.

The  UM82152 architecture  enables easy  design-in with  current speed
versions  of  the  80386,  and  simple  migration  to  faster  version
processors with no alteration to system or memory design.

The 80386,  operating in  pipelined mode with  the UM82152,  runs with
zero  wait states during  a cache  hit (requested  data is  present in
cache). If  the data is not  present (cache miss), it  is fetched from
main  memory by  the  UM82152.  This  approach  yields the  high-speed
performance  of fast  SRAMs for  code and  data most  frequently used,
while  providing design  economies (such  as board  space  savings and
lower component costs)  by storing infrequently used code  and data in
slower  dynamic RAM (with  cycle times  greater than  125 nanoseconds)
that  can  be  located  in  large  memory  banks  either  on-board  or
off-board.

The reduced system bus  traffic inherent in the UM82152 implementation
produces system performance gains by  freeing the bus for use by other
devices.

***Versions:...
***Features:...
**UM82C852     Multi I/O For XT                                    <91...
**UM82C206     Integrated Peripheral Controller                    <91...
**UM82c45x     Serial/Parallel chips                                 ?...
**Other chips:...
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