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**82495DX/490DX DX CPU-Cache Chip Set                           <Sep91
***Notes:...
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**82495XP/490XP Cache Controller / Cache RAM (for i860)       06/05/91...
**82496/491     Cache Controller / Cache RAM (for P5 Pentium) 03/22/93...
**82497/492   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**82498/493   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
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**450NX  (?)            06/29/98:...
**?????  (Profusion)    c:99...
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**SL9025  Address Controller                                    <oct88
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**SL9090  Universal PC/AT Clock Chip                            <oct88...
**SL9250  Page Mode Memory Controller (16/20MHz 8MB Max)        <oct88...
**SL9350  Page Mode Memory Controller (16/20/25MHz 16MB Max)    <oct88...
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**TACT84500   AT Chip Set (486, EISA) [no datasheet, some info]    c91
***Notes:
InfoWorld Oct 28, 1991 p38:
"...Unlike earlier EISA chip sets, Ti's Tact84500 is comprised of only
four VLSI chips for controlling the bus, memory, peripherals, and data
path unit. The Tact unit can also control eight EISA bus masters along
with DRAM and a single-layer  EISA-bus write buffer.  According to TI,
the suggested  price of the  EISA chip set,  at $130 in  quantities of
100, should  make EISA-based  systems price competitive  with existing
ISA-based systems."

At least one of the chips is called 84542. This is probably the memory
controller.



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