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**82396SX Smart Cache 12/17/90
***Notes:...
***Info:...
***Versions:...
***Features:...
**82485 Turbo Cache (and 485Turbocache) c90...
**82489DX Advanced Programmable Interrupt Controller 10/12/92...
**82495DX/490DX DX CPU-Cache Chip Set <Sep91...
**82495XP/490XP Cache Controller / Cache RAM (for i860) 06/05/91...
**82496/491 Cache Controller / Cache RAM (for P5 Pentium) 03/22/93...
**82497/492 Cache Controller / Cache RAM (for P54 Pentium) <Nov94...
**82498/493 Cache Controller / Cache RAM (for P54 Pentium) <Nov94...
**
**Later chipsets (basic spec):
**440 series:...
**450NX (?) 06/29/98:...
**????? (Profusion) c:99...
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**SN74LS610/2 IBM AT: SN74LS610, SN74LS612 Memory Mappers <84
***Notes:...
***Info:
Each 'LS610 and 'LS612 memory mapper integrated circuit contains a
4-line to 16-line decoder, a 16-word by 12-bit RAM, 16 channels of
2-line to 1-line multiplexers, and other miscellaneous circuitry on a
monolithic chip. Each 'LS610 also contains 12 latches with an enable
control.
The memory mappers are designed to expand a microprocessor's memory
addressing capability by eight bits. Four bits of the memory address
bus (see System Block Diagram)[see datasheet] can be used to select
one of 16 map registers that contain 12 bits each. these 12 bits are
presented to the system memory address bus through the map output
buffers along with the unused memory address bits from the CPU.
However, addressable memory space without reloading the map registers
is the same as would be available with the memory mapper left out.
The addressable memory space is increased only by periodically
reloading the map registers from the data bus. This configuration
lends itself to memory utilization of 16 pages of 2^(n-4) registers
each without reloading (n - number of address bits available from
CPU).
These devices have four modes of operation: read, write, map, and
pass. Data may be read from or loaded into the map register selected
by the register select inputs (RS0 thru RS3) under control of R/W
whenever chip select (CS) is low. The data I/O takes place on the data
bus DO thru D7. The map operation will output the contents of the map
register selected by the map address inputs (MA0 thru MA3) when CS is
high and MM (map mode control) is low. The 'LS612 output stages are
transparent in this mode, while the 'LS610 outputs may be transparent
or latched. When CS and MM are both high (pass mode), the address bits
on MA0 thru MA3 appear at M08-MO11, respectively (assuming appropriate
latch control) with low levels in the other bit positions on the map
outputs.
***Versions:...
***Features:...
**TACT82000 3-Chip 286 [no datasheet] c89...
**TACT82411 Snake Single-Chip AT Controller c90...
**TACT82S411 Snake+ Single-Chip AT Controller [no datasheet] c91...
**TACT83000 AT 'Tiger' Chip Set (386) c89
***Info:...
***Configurations:...
***Features:...
**TACT84500 AT Chip Set (486, EISA) [no datasheet, some info] c91...
**Other:...
*UMC...
*Unresearched:...
*VIA...
*VLSI...
*Western Digital...
**Other Chips:
SYSTEMS LOGIC/PERIPHERAL DEVICES
WD16C451, WD16C551 - Enhanced Asynchronous Communications Element (ACE) with Parallel Port
WD16C452, WD16C552 - Dual Enhanced Asynchronous Communications Element (ACE)
WD16C550 Enhanced Asynchronous Communications Element (ACE) with FIFOs
WD76C10AlLP/LV ISA-Based System Controller for 80386SX and 80286 Desktop and Portable Compatibles
WD76C20/LV Floppy Disk Controller, Real Time Clock, IDE Interface, and Support Logic Device
WD76C30/LV Peripheral Controller, Interrupt Multiplexer, and Clock Generator Device
WD7710/LP ISA-Based System Controller with Cache for 80386SX and 80286 Desktop and Portable Compatibles
WD7910/LP ISA-Based System Controller with Cache for 80386SX and 80286 Desktop and Portable Compatibles
IMAGING DEVICES
ICS90C61A Dual Video/Memory Clock Generator
ICS90C63 Dual Video/Memory Clock Generator
ICS90C64 Dual Video/Memory Clock Generator
WD90C00 VGA Controller (8514/A clone, max 1MB, 1024x768x16, 800x600x256)
WD90C01 8514/A for laptops
WD90C10 VGA, 256KB
WD90C11, WD90C11A Enhanced VGA Controller (max 512KB, 1024x768x16, 800x600x256)
WD90C20, WD90C20A VGA Flat Panel Display Controller (800x600x16, 640x460x256, 32 shades gray)
WD90C22 VGA Flat Panel Display Controller (800x600x16, 640x460x256, 64 shades gray)
WD90C24/A/A2 SVGA, max 1MB, 1280x1024x16, 1024x768x16, LCD, VESA-LB, 3.3 or 5V
WD90C26 VGA Flat Panel Display Controller
WD90C30 High Performance Video Controller (max 1MB, 1024x768x256, 1024x768x16)
WD90C31 Accelerator Video Controller (max 1MB, 1024x768x256, 1280x1024x16)
WD90C33 Same as WD90C31 but with, max 2MB, VESA-LB, 1280x1024x256, 1280x1024x16)
WD90C55 VGA LCD Interface
WD90C56 VLBI (Video Local Bus Interface), for WD90C30/31, VESA not mentioned.
WD9710 Pipelined, 32bit core, 64bit RAM, 24bit RAMDAC, PCI/VLB
WD9712 similar to WD9710
STORAGE DEVICES
WD10C01A Winchester Disk Controller
WD10C27 Data Separator
WD33C92A Enhanced SCSI Bus Interface Controller
WD33C93B Enhanced SCSI Bus Interface Controller
WD33C95A, WD33C96A Enhanced Single-ended and Differential SCSI Bus Interface Controller
WD37C65C Floppy Disk Subsystem Controller Device
WD42C22C Winchester Disk Subsystem Controller Device
WD60C318 Optical Disk Drive Encoder/Decoder
WD60C40A Peripheral Cache Manager Device
WD60C80 Error Detection and Correction Chip (EDAC)
WD61C23A High Performance Hard Disk Controller
WD61C40A Peripheral Cache Manager Device
WD7000 ESDI Controller (16-bit ISA)
WD7193 Fast SCSI-II PCI adapter, 33C296A-ZX chip
WD7197 Fast Wide version of WD7193
WD7296A Fast Wide SCSI-II (PCI?), possibly WD34C296 chip
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