[Home] [This version is outdated, a new version is here]
*Title...
*Search:...
*Read Me/FAQ/General Info...
*_IBM...
*ACC Micro...
*ALD...
*ALi...
*AMD . . . . . . . [no datasheets, some info]...
*Chips & Technologies...
*Contaq  . . . . . [no datasheets, some info]...
*Efar Microsystems [no datasheets, some info]...
*ETEQ...
*Faraday...
*Forex . . . . . . [List only, no datasheets found]...
*Intel...
**440 series:
***440FX (Natoma)       05/06/96...
***440LX (Balboa)       08/27/97...
***440BX (Seattle)      c:Apr'98...
***440DX (?)            c:?...
***440EX (?)            c:Apr'98...
***440GX (Marlinespike) 06/29/98...
***440ZX & 440ZX-66 (?) 01/04/99...
***440ZX-M (?)          05/17/99...
***440MX (Banister)     05/17/99...
**450NX  (?)            06/29/98:...
**?????  (Profusion)    c:99...
**800 series...
*Headland/G2...
*HMC (Hulon Microelectronics)...
*Logicstar...
*Motorola...
*OPTi...
**82C822         PCIB (VLB-to-PCI bridge)                         c:94
***Notes:...
***Info:...
***Versions:...
***Features:...
**Other:...
*PC CHIPS/Amptron/Atrend/ECS/Elpina/etc...
*SIS...
*Symphony...
**SL82C465    Cache Controller (for 486/386DX/SX)                 c:91
***Info:...
***Versions:...
***Features:
o   Integrated direct mapped cache controller
o   Supports 486/386DX/386SX CPU
o   Supports both 1X and 2X CPU clock
o   Supports 486DX/SX/DX2/SLC up to 50 MHz
o   Supports 386DX/SX/SXLV up to 40 MHz
o   16KB to 4MB cache size
o   Line size from 1 to 4 doublewords
o   VL-Bus Master Device support
o   2-1-1-1 burst mode cache fill
o   Data streaming in external and internal cache
o   SRAM banks interleaving capability
o   Built-in tag comparator
o   Posted write buffer control
o   Cache invalidation support
o   Non-cacheable region support
o   387SX/387/3167/4167 interface
o   Arbitration between reset and HOLD
o   CMOS 100-pin RQFP package

*TI (Texas Instruments)...
*UMC...
*Unresearched:...
*VIA...
*VLSI...
*Western Digital...
*Winbond...
*ZyMOS...
*General Sources:...