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**450NX  (?)            06/29/98:
Chips:
[82454NX] (PXB) [82453NX] (MUX) 
[82452NX] (RCG) [82451NX] (MIOC) 
[82371EB] (PIIX4E),                            
CPUs:          Single/Dual/Quad P-II Xeon/P-III Xeon
DRAM Types:    FPM EDO 2-way Interleave 4-way Interleave
Mem Rows:      8
DRAM Density:  16Mbit 64Mbit
Max Mem:       8GB
ECC/Parity:    Both
AGP speed:     N/A
Bus Speed:     100
PCI Clock/Bus: 1/3


**?????  (Profusion)    c:99...
**800 series...
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*OPTi...
**82C700         FireStar                                         c:97
***Info:...
***Configurations:...
***Features:...
**82C701         FireStar Plus                                    c:97...
**82C750         Vendetta      [no datasheet]                        ?...
**82c801         SCWB2 DX Single Chip Solution                    c:92...
**82C802         SCWB2 PC/AT Single Chip [no datasheet]              ?...
**82C802G/GP     System/Power Management Controller (cached)      c:93...
**82C895         System/Power Management Controller (cached)   c:Sep94...
**82C898         System/Power Management Controller (non-cache)c:Nov94...
**
**Support Chips:
**82C601/2       Buffer Devices                                 <Nov94...
**82C822         PCIB (VLB-to-PCI bridge)                         c:94...
**Other:...
*PC CHIPS/Amptron/Atrend/ECS/Elpina/etc...
*SIS...
**85C496/497     486-VIP 486 Green PC VESA/ISA/PCI Chipset         <95
***Info:
The SiS 486-VIP (VESA/ISA/PCI) chips are two-chip solution ideally for
Intel's 80486, SL Enhanced 486, P24D/P24T/DX4 CPU, AMD's 486, Enhanced
Am486 and Cyrix's Cx486 (M7)/Cx 5x86 CPU based on green AT system.  By
supporting the most popular  industrial standard system interfaces, it
provides flexible configurations for system design and applications.

The SiS85C496  PCI & CPU  Memory Controller (PCM) integrates  the Host
Bridge (Host  Interface), the cache  and main memory  DRAM Controller,
the PCI Bridge, the built-in IDE Controller, and the FS-Link Bus (Fast
Slow  Link Bus). It  provides the  address paths  and bus  control for
transfers among  the Host  (CPU/L1 cache), main  memory (L2  cache and
DRAM),  the  Peripheral  Component  Interconnect (PCI)  Bus,  and  the
FS-Link Bus.  The L2  cache controller supports both write-through and
write-back cache policies  and cache sizes up to  1 MBytes.  The cache
memory  can be  built  using standard  asynchronous  SRAMs.  The  main
memory DRAM controller  interfaces DRAM to the Host  Bus, PCI Bus, and
FS-Link Bus. Up to eight single sided SIMMs or four double sided SIMMs
provide a maximum  of 255 MBytes of main  memory.  The installation of
DRAM SIMMs is  "Table-Free", which allows the SIMMs  be installed into
any slot  location and any  combinations.  The built-in IDE  hard disk
controller  allows CPU accessing  hard disk  and also  provides higher
system integration with  lower system cost. The 85C496  is intended to
be used with the SiS85C497 which  is a AT Bus Controller with built-in
206 controller.

The  SiS85C497 AT  Bus  Controller and  Megacells  (ATM) provides  the
interface between  PCI/CPU/Memory Bus (fast  machine) and the  ISA Bus
(slow machine).  It  also integrates many of the  common I/O functions
in today's  ISA based  PC systems.  The  85C497 comprises  the FS-Link
interface  (Fast-Slow  Link  interface),  ISA  bus  controller  ,  DMA
controller and  data buffers to isolate  the FS-Link Bus  from the ISA
Bus  and to  enhance performance.   It  also integrates  a 14  channel
edge/level  interrupt  controller, refresh  controller,  a 8-bit  BIOS
timer, three programmable timer/counters, non-maskable-interrupt (NMI)
control  logic, Power  Management  Unit,  and RTC.  Figure  1 .1  [see
datasheet] shows the system block diagram.


***Configurations:...
***Features:...
**85C501/502/503 Pentium/P54C PCI/ISA Chipset                <01/09/95...
**5101/5102/5103 Pentium/P54C PCI/ISA Chipset                <04/02/95...
**5120           Pentium PCI/ISA Chipset (Mobile)            <01/28/97...
**5501/5502/5503 Pentium/P54C PCI/ISA Chipset                <04/02/95...
**5511/5512/5513 Pentium PCI/ISA                             <06/14/95...
**5571           (Trinity) Pentium PCI/ISA Chipset (75MHz)   <12/09/96...
**5581/5582      (Jessie)  Pentium PCI/ISA Chipset (75MHz)   <04/15/97...
**5591/5592/5595 (David)   Pentium PCI A.G.P. Chipset        <01/09/98...
**5596/5513      (Genesis) Pentium PCI Chipset               <03/26/96...
**5597/5598      (Jedi)    Pentium PCI/ISA Chipset           <04/15/97...
**530/5595       (Sinbad) Host, PCI, 3D Graphics & Mem. Ctrl.<11/10/98...
**540            (Spartan) Super7 2D/3D Ultra-AGP Single C.S.<11/30/99...
**55x            SoC (System-on-chip)                        <03/14/02...
**
**Support chips:
**85C206     Integrated Peripheral Controller [no datasheet]         ?...
**5595       Pentium PCI System I/O                          <12/24/97...
**950        LPC I/O                                         <07/16/99...
**Other:...
**PII/III/Pro...
**Athlon etc...
*Symphony...
*TI (Texas Instruments)...
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*Unresearched:...
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