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*Intel...
**82385 32-bit Cache Controller for 80386 09/29/87
***Notes:...
***Info:
The 82385 Cache Controller is a high performance 32-bit peripheral for
Intel's 80386 Microprocessor. It stores a copy of frequently accessed
code and data from main memory in a zero wait state local cache
memory. The 82385 enables the 80386 to run at its full potential by
reducing the average number of CPU wait states to nearly zero. The
dual bus architecture of the 82385 allows other masters to access
system resources while the 80386 operates locally out of its cache.
In this situation, the 82385's "bus watching" mechanism preserves
cache coherency by monitoring the system bus address lines at no cost
to system or local throughput.
The 82385 is completely software transparent, protecting the integrity
of system software. High performance and board savings are achieved
because the 82385 integrates a cache directory and all cache
management logic on one chip.
1.0 82385 FUNCTIONAL OVERVIEW
Th~ 82385 Cache Controller is a high performance 32-bit peripheral for
Intel's 80386 microprocessor. This chapter provides an overview of
the 82385, and of the basic architecture and operation of an 80386/
82385 system.
1.1 82385 OVERVIEW
The main function of a cache memory system is to provide fast local
storage for frequently accessed code and data. The cache system
intercepts 80386 memory references to see if the required data resides
in the cache. If the data resides in the cache (a hit), it is returned
to the 80386 without incurring wait states. If the data is not cached
(a miss), the reference is forwarded to the system and the data
retrieved from main memory. An efficient cache will yield a high "hit
rate" (the ratio of cache hits to total 80386 accesses), such that the
majority of accesses are serviced with zero wait states. The net
effect is that the wait states incurred in a relatively infrequent
miss are averaged over a large number of accesses, resulting in an
average of nearly zero wait states per access. Since cache hits are
serviced locally, a processor operating out of its local cache has a
much lower "bus utilization" which reduces system bus bandwidth
requirements, making more bandwidth available to other bus masters.
The 82385 Cache Controller integrates a cache directory and all cache
management logic required to support an external 32 Kbyte cache. The
cache directory structure is such that the entire physical address
range of the 80386 (4 Gigabytes) is mapped into the cache. Provision
is made to allow areas of memory to be set aside a non-cacheable. The
user has two cache organization options: direct mapped and 2-way set
associative. Both provide the high hit rates necessary to make a
large, relatively slow main memory array look like a fast, zero wait
state memory to the 80386.
A good hit rate is an essential ingredient of a successful cache
implementation. Hit rate is the measure ,of how efficient a cache is
in maintaining a copy of the most frequently requested code and data.
However, efficiency is not the only factor for performance
consideration. Just as essential are sound cache management
policies. These policies refer to the handling of 80386 writes,
preservation of cache coherency, and ease of system design. The
82385's "posted write" capability allows 80386 memory writes,
including non-cacheable, to run with zero wait states, and the 82385's
"bus watching" mechanism preserves cache coherency with no impact on
system performance. Physically, the 82385 ties directly to the 80386
with virtually no external logic.
***Versions:...
***Features:...
**82385SX 32-bit Cache Controller for 80386SX 01/25/89...
**82395DX High Performance Smart Cache 06/18/90...
**82395SX Smart Cache 12/17/90...
**82396SX Smart Cache 12/17/90...
**82485 Turbo Cache (and 485Turbocache) c90...
**82489DX Advanced Programmable Interrupt Controller 10/12/92...
**82495DX/490DX DX CPU-Cache Chip Set <Sep91...
**82495XP/490XP Cache Controller / Cache RAM (for i860) 06/05/91...
**82496/491 Cache Controller / Cache RAM (for P5 Pentium) 03/22/93
***Notes:...
***Info:...
***Configurations:...
***Features:...
**82497/492 Cache Controller / Cache RAM (for P54 Pentium) <Nov94...
**82498/493 Cache Controller / Cache RAM (for P54 Pentium) <Nov94...
**
**Later chipsets (basic spec):
**440 series:...
**450NX (?) 06/29/98:...
**????? (Profusion) c:99...
**800 series...
*Headland/G2...
*HMC (Hulon Microelectronics)...
*Logicstar...
*Motorola...
*OPTi...
**82C556/7/8 Viper [no datasheet] ?
***Configurations:...
**82C556/7/8N Viper-N Viper Notebook Chipset <05/25/95...
**82C556M/7M/8E Viper-N+ Viper Notebook Chipset c:96...
**82C566/7/8 Viper-Max Chipset Scalable MultiMedia PC Solution ?...
**82C571/572 486/Pentium c:93...
**82C576/7/8 Viper Xpress [no datasheet] ?...
**82C576/8/9 Viper XPress+ [no datasheet, some info] <01/16/97...
**82C596/597 PTMAWB Pentium Adaptive Write-back (Cobra) c:93...
**82C650/1/2 Discovery (Pentium Pro) [no datasheet] ?...
**82C681/2/6/7 386/486WB EISA c:92...
**82C683 386/486AWB EISA [no datasheet] ?...
**82C693/6/7 Pentium uP Write Back Cache EISA c:93...
**82C700 FireStar c:97...
**82C701 FireStar Plus c:97...
**82C750 Vendetta [no datasheet] ?...
**82c801 SCWB2 DX Single Chip Solution c:92...
**82C802 SCWB2 PC/AT Single Chip [no datasheet] ?...
**82C802G/GP System/Power Management Controller (cached) c:93...
**82C895 System/Power Management Controller (cached) c:Sep94...
**82C898 System/Power Management Controller (non-cache)c:Nov94...
**
**Support Chips:
**82C601/2 Buffer Devices <Nov94...
**82C822 PCIB (VLB-to-PCI bridge) c:94...
**Other:
OPTi 82C200 - ChromaCast LCD-VGA chipset
OPTi 82C205 - LCD panel controller / scalar
OPTi 82C264 - 2D VGA controller
OPTi 82C265 - Video ????????????????????????????
OPTi 82C268 - Video ????????????????????????????
OPTi 82C611 - EIDE VLB
OPTi 82C611A - EIDE VLB
OPTi 82C621 - PCI-to-IDE controller
OPTi 82C621A - PCI-to-IDE controller
OPTi 82C824 - FireFox PCI to PCMCIA Controller
OPTi 82C825 - FireBridge II PCI to PCMCIA Controller
OPTi 82C814 - Docking Station Controller for laptops (PCI-to-PCI bridge)
OPTi 82C842 - PCI-to-IEEE 1393 FireWire
OPTi 82C832 - ?????????????????????????????????????????
OPTi 82C861 - PCI-to-USB Bridge c1997
OPTi 82C862 - PCI-to-USB Bridge 4x port
OPTi 82C863 - PCI-to-USB Bridge 2x port
OPTi 82C871 - PCI-to-USB Bridge + Sound Blaster compatibility and USB 2.0
OPTi 82C916 - Audio, ISA, serial CODEC) used in combination with Vendetta chipset 82C750
OPTi 82C924 - Audio, ISA
OPTi 82C925 - ISA Audio Controller (replaces the 924)
OPTi 82C928 - (MAD16) ISA Audio Controller (Emulates Sound Blaster Pro) c1993
OPTi 82C929 - (MAD16 Pro) ISA Audio Controller (Emulates Sound Blaster Pro) c1994
OPTi 82C930 - ISA Audio Controller (Emulates Sound Blaster Pro, AdLib)
OPTi 82C931 - ISA Audio controller (Emulates Sound Blaster Pro, AdLib)
OPTi 82C933 - Audio ?????????????????????????????
OPTi 82C935 - EV1935 ECTIVA MachOne PCI Audio
OPTi 82C941 - Wavetable chip, has something to do with 82C930
OPTi 82C950 - (MAD32) Audio/Modem controller (Emulates Sound Blaster Pro) c1994
OPTi 92C160 - Clock Generator for 92C168
OPTi 92C168 - LCD VGA controller c1993
OPTi 92C178 - LCD VGA controller with blt c1993
OPTi 92C264 - 2D VGA controller
-------------------------------------------------
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