[Home] [This version is outdated, a new version is here]
*Title...
*Search:...
*Read Me/FAQ/General Info...
*_IBM...
*ACC Micro...
*ALD...
*ALi...
*AMD . . . . . . . [no datasheets, some info]...
*Chips & Technologies...
*Contaq  . . . . . [no datasheets, some info]...
*Efar Microsystems [no datasheets, some info]...
*ETEQ...
*Faraday...
*Forex . . . . . . [List only, no datasheets found]...
*Intel...
**82395SX     Smart Cache                                     12/17/90
***Notes:
date source: TimelineDateSort7_05.pdf.

Also states:  82395SX (8-kilobyte);  82396SX (16-Kbyte);  Extension of
386(TM) Smart cache architecture with two new versions of cache memory
controllers.  Designed for  20-megahertz  Intel386 SX  microprocessor-
based systems

Could not find datasheet, see 82396SX, YMMV.

**82396SX     Smart Cache                                     12/17/90...
**82485       Turbo Cache (and 485Turbocache)                      c90...
**82489DX       Advanced Programmable Interrupt Controller    10/12/92...
**82495DX/490DX DX CPU-Cache Chip Set                           <Sep91...
**82495XP/490XP Cache Controller / Cache RAM (for i860)       06/05/91...
**82496/491     Cache Controller / Cache RAM (for P5 Pentium) 03/22/93...
**82497/492   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**82498/493   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**
**Later chipsets (basic spec):
**440 series:...
**450NX  (?)            06/29/98:...
**?????  (Profusion)    c:99...
**800 series...
*Headland/G2...
*HMC (Hulon Microelectronics)...
*Logicstar...
*Motorola...
*OPTi...
**82C693/6/7     Pentium uP Write Back Cache EISA                 c:93
***Notes:...
***info:...
***Configurations:...
***Features:
o   Fastest 100% EISA compatible 60/66 MHz Pentium write back chipset 
o   Patented write back controller 
    - Flexible cache sizes -128K to 1 MB 
o   High performance, closely coupled, 8 bank DRAM controller 
    - Direct connections for both single and double density x36 SIMMs 
    - 2MB-256MB main memory with just 8 SIMMs 
o   Total system performance tuning features 
    - Hidden refresh 
    - Programmable holes in memory 
    - CPU bus local device support 
    - Fast GATEA20/transparent CPU reset 
    - Synchronous EISA bus clock with relaxed skew requirements 
    - Video/system BIOS shadowable and cacheable 
o   Complete EISA motherboard 
o   Low power, high speed CMOS technology 

**82C700         FireStar                                         c:97...
**82C701         FireStar Plus                                    c:97...
**82C750         Vendetta      [no datasheet]                        ?...
**82c801         SCWB2 DX Single Chip Solution                    c:92...
**82C802         SCWB2 PC/AT Single Chip [no datasheet]              ?...
**82C802G/GP     System/Power Management Controller (cached)      c:93...
**82C895         System/Power Management Controller (cached)   c:Sep94...
**82C898         System/Power Management Controller (non-cache)c:Nov94...
**
**Support Chips:
**82C601/2       Buffer Devices                                 <Nov94...
**82C822         PCIB (VLB-to-PCI bridge)                         c:94...
**Other:...
*PC CHIPS/Amptron/Atrend/ECS/Elpina/etc...
*SIS...
*Symphony...
*TI (Texas Instruments)...
*UMC...
*Unresearched:...
*VIA...
*VLSI...
*Western Digital...
*Winbond...
*ZyMOS...
*General Sources:...

(c) Copyright mR_Slugs Warehouse - All rights Reserved