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**82496/491     Cache Controller / Cache RAM (for P5 Pentium) 03/22/93
***Notes:...
***Info:...
***Configurations:...
***Features:...
**82497/492   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**82498/493   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**
**Later chipsets (basic spec):
**440 series:...
**450NX  (?)            06/29/98:...
**?????  (Profusion)    c:99...
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*Headland/G2...
**HTK340        "Shasta" 486 Chip Set                          c:Jun92
***Notes:...
***Info:...
***Configurations:...
***Features:...
**Support Chips:
**HT44          Secondary Cache                                c:Jun92...
**Other:...
*HMC (Hulon Microelectronics)...
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**82C566/7/8     Viper-Max Chipset Scalable MultiMedia PC Solution   ?
***Info:...
***Configurations:...
***Features:
CPU Interface
o   Fully supports all Intel 3.3V Pentium processors (P54C, P55C, 
    P55CT) at 50, 60, and 66.667MHz
o   Supports AMD K86 and Cyrix 6x86 processors
o   Supports the Cyrix 6x86 processor linear burst mode
o   Chipset solution:
    - One Data Buffer Controller (82C566)
    - One System Controller (82C567)
    - One Integrated Peripherals Controller (82C568)
o   Supports CPU address pipelining

Cache Interface
o   Support four types of devices:
    - Synchronous SRAM bursting at 3-1-1-1
    - Pipelined burst SRAM bursting at 3-1-1-1
    - Sony SONIC-2WP module bursting at 2-1-1-1
    - Asynchronous SRAM bursting at 3-2-2-2
o   Supports four cache sizes:
    - 256KB, 512KB, 1MB and 2MB
o   Programmable write policy:
    - Write-back
    - Adaptive write-back
    - Write-through

DRAM Interface
o   Supports both Unified Memory Architecture (UMA) and non-UMA 
    interfaces
o   Supports symmetrical and asymmetrical DRAMS
o   Supports both 3.3V and 5.0V DRAM devices
o   Supports 64-bit wide DRAM devices with 256KB, 512KB, 1MB, 2MB, 
    4MB, 8MB, and 16MB addressing
o   Supports DRAM configurations up to 512MB
o   Six banks of FP mode DRAMs (7-3-3-3 at 66MHz)
o   Six banks of EDO DRAM support with auto detection (5-2-2-2 at 
    66MHz)
o   Four banks of BEDO (burst EDO) (X-1-1-1 at 66MHz)
o   Four banks of SDRAM (synchronous DRAM) (X-1-1-1 at 66MHz)
o   Deep buffering for DRAM performance
    - Six quad-word CPU-to-DRAM write posting
    - 24 double-word PCI-to-DRAM write posting
    - 24 double-word DRAM-to-PCI read prefetch
o   Supports mixed DRAM memory technologies
    - FP mode/EDO/SDRAM
    - FP mode/EDO/BEDO
o   Memory parity support
o   Programmable drive currents for the DRAM control signals
o   Hidden refresh with CAS-before-RAS refresh supported
o   Self-refresh supported during Suspend mode
o   Support for two programmable non-cacheable memory regions

Unified Memory Interface
o   Industry Standard UMA implementation
o   Compatible with all major graphics chip vendors
o   Supports 0.5, 1.0, 2.0, 3.0, and 4.0MB of shared frame, buffer for 
    GUI (Graphical User interface) within system DRAM
o   Two-pin arbitration scheme with multiple request levels

PCI Interface
o   PCI Specification 2.1 compliant 
    - Supports delayed transactions
o   X-1-1-1 PCI to memory burst transfer performance (transfer 
    rate > 100MB/sec)
o   Interfaces the CPU and standard buses to Peripheral Component 
    Interconnect (PCI) operating in synchronous/asynchronous modes
o   CPU-to-PCI deep write posting buffers (six double-words)
o   PCI-to-DRAM deep write posting and read prefetch buffers
    (24 double-words)
o   Supports five PCI masters and six ISA slots
o   Supports PCI pre-snoop for PCI masters
o   PCI byte/word merge support for CPU accesses to PCI bus, and 
    support for PCI prefetch
o   Several levels of concurrence
    - PCI-to-PCI / CPU-to-memory
    - PCI-to-DRAM / CPU-to-cache
    - CPU-to-PCI / GUI-to-memory

IDE Interface
o   Integrated bus master IDE conforms to SFF Specification
o   Two channels supported (up to four devices)
o   PIO Mode transfer support (up to Mode 5)
o   Enhanced ATA Specification support
o    Single- and/or Multi-Word DMA Mode 2 timing
o   Scatter/Gather feature
o   Built-in FIFOs with data prefetch and post write support
Universal Serial Bus
o   Support for Universal Serial Bus (USB) interface for serial
    peripherals
System I/O and Power Management
o   Enhanced DMA interface
    - Type F DMA for faster device transfer
    - Distributed DMA for moving ISA function to PCI
    - Buffered DMA for efficient POI/DRAM bandwidth
    - Two steerable DMA channels for motherboard plug and play
o   Enhanced interrupt interface
    - Serial interrupt for moving ISA function to PCI
    - Two steerable interrupts for motherboard plug and play
o   Includes a fully integrated 820206 with external real-time clock 
    (RTC) interface
o   Facility to read current CMOS index
o   "True" GREEN power management support, with support for STPCLK# 
    modulation and the CPU stop clock state 
o   Packaged in three 208-pin PQFPs (Plastic Quad Flat Packs)


**82C571/572     486/Pentium                                      c:93...
**82C576/7/8     Viper Xpress  [no datasheet]                        ?...
**82C576/8/9     Viper XPress+ [no datasheet, some info]     <01/16/97
***Notes:...
***Info:...
***Configurations:...
**82C596/597     PTMAWB Pentium Adaptive Write-back (Cobra)       c:93...
**82C650/1/2     Discovery (Pentium Pro) [no datasheet]              ?...
**82C681/2/6/7   386/486WB EISA                                   c:92...
**82C683         386/486AWB EISA [no datasheet]                      ?...
**82C693/6/7     Pentium uP Write Back Cache EISA                 c:93...
**82C700         FireStar                                         c:97...
**82C701         FireStar Plus                                    c:97...
**82C750         Vendetta      [no datasheet]                        ?...
**82c801         SCWB2 DX Single Chip Solution                    c:92...
**82C802         SCWB2 PC/AT Single Chip [no datasheet]              ?...
**82C802G/GP     System/Power Management Controller (cached)      c:93...
**82C895         System/Power Management Controller (cached)   c:Sep94...
**82C898         System/Power Management Controller (non-cache)c:Nov94...
**
**Support Chips:
**82C601/2       Buffer Devices                                 <Nov94...
**82C822         PCIB (VLB-to-PCI bridge)                         c:94...
**Other:...
*PC CHIPS/Amptron/Atrend/ECS/Elpina/etc...
*SIS...
*Symphony...
*TI (Texas Instruments)...
*UMC...
*Unresearched:...
*VIA...
*VLSI...
*Western Digital...
*Winbond...
*ZyMOS...
*General Sources:...

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