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**????? (Profusion) c:99
Chips:
Memory Access Controller (MAC)
Data Interface Buffer (DIB)
CPUs: 8x P-III Xeon Oct
DRAM Types: SDRAM PC100 2-way Interleave dual channel
Max Mem: 32GB
ECC/Parity: ECC
AGP speed: N/A
Bus Speed: 100
PCI Clock/Bus: 1/3 PCI-66/64
**800 series...
*Headland/G2...
**Notes:
InfoWorld Apr 10, 1989 p42 - Video Severn and G-2 Will Merge to form
Headland Technology.
...affiliate of LSI logic.
According to:
http://www.vgamuseum.info/index.php/news/itemlist/category/15-headland-technology
Graphics chips were renamed from GC*** to HT***. In this document any
part no. that differs only by GC/HT have been assumed to be a renamed
part.
**GC101/102 12/16MHz PC/AT Compatible Chip Set c:Feb88...
**GC101/102/103 12/16MHz PC/AT Compatible Chip Set + EMS 4.0 c:Jul89...
**GCK113 80386 AT Compatible Chip Set c:oct89...
**GCK181 Universal PS/2 Chip Set c:Mar89...
**HT11 Single 286 AT Chip [no datasheet] <Aug90...
**HT12/+/A Single 286 AT Chip with EMS support c:Aug90...
**HT18 80386SX Single Chip c:Sep91...
**HT21 386SX/286 Single Chip (20 MHz) c:Aug91...
**HT22 386SX/286 Single Chip (25 MHz) c:Sep91...
**HT25 3-volt Core Logic for 386SX c:Dec92...
**HT35 Single-Chip Peripheral Controller [partial info] ?...
**HTK320 386DX Chip Set c:Sep91...
**HTK340 "Shasta" 486 Chip Set c:Jun92
***Notes:...
***Info:...
***Configurations:...
***Features:
o Support for 486SX/DX/DX2 CPU
o 2 - 184 pin PQFP devices
o Local bus interface
o 16, 20, 25 and 33MHz CPU speeds
o Fully static operation
o Weitek 4167 supported
o System and Video BIOS on single ROM
o Uses 0.7 Micron HCMOS process
ISA Controller
o AT Compatible
o Synchronized 8MHz ISA bus
o Posted backplane memory writes
o 10 or 16 bit l/O mapping
o Integrated 82375, 82593 and 8254 functionality
o Fast gate A20/Fast reset
Write Buffer
o 4 deep on-chip buffer
o Byte gathering
o Out of order operation
o Full or partial write buffer hits
DRAM Controller
o Line burst capability from DRAM to 80486
o 256K/1M/4M/16M DRAMs
o Mixed memory types
o EMS 4.0
o Hidden refresh operation
o 256MB Maximum system memory
o Staggered refresh
o Shadowing in 16KB increments between 640KB and 1MB
o Remapping
o Fast paging
o 2 or 4 way interleaving
**Support Chips:
**HT44 Secondary Cache c:Jun92...
**Other:...
*HMC (Hulon Microelectronics)...
*Logicstar...
*Motorola...
*OPTi...
*PC CHIPS/Amptron/Atrend/ECS/Elpina/etc...
*SIS...
*Symphony...
*TI (Texas Instruments)...
*UMC...
*Unresearched:...
*VIA...
*VLSI...
*Western Digital...
*Winbond...
**W83877F WINBOND I/O (Multi I/O) <96
***Info:...
***Versions:...
***Features:...
**W83877TF/TG/TD WINBOND I/O (Multi I/O) c97...
**W83977F/G/AF/AG WINBOND I/O (Multi I/O) c97...
**W83977TF WINBOND I/O (Multi I/O) c97...
**W83977EF WINBOND I/O (Multi I/O) <98...
**W83977ATF WINBOND I/O (Multi I/O) <98...
**
**Disk Controller:
**W83759/A/F/AF Advanced VL-IDE Disk Controller <96...
**W83769 Local Bus IDE Solution <94...
**
**UARTS:
**W86C250A UART (equivalent of INS8C250A) [no datasheet]
**W86C450/P Universal Asynchronous Receiver/Transmitter <Jul89...
**W86C451 I/O controller for IBM PC/AT/XT <Jul89...
**W86C452 I/O controller for IBM PC/AT Jul89...
**W86C456 I/O controller [no datasheet] ?
**W860551/P UART with FIFO and Printer Port Controller <94...
**
**Other:...
*ZyMOS...
*General Sources:...
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