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**82395SX     Smart Cache                                     12/17/90
***Notes:...
**82396SX     Smart Cache                                     12/17/90...
**82485       Turbo Cache (and 485Turbocache)                      c90...
**82489DX       Advanced Programmable Interrupt Controller    10/12/92...
**82495DX/490DX DX CPU-Cache Chip Set                           <Sep91...
**82495XP/490XP Cache Controller / Cache RAM (for i860)       06/05/91...
**82496/491     Cache Controller / Cache RAM (for P5 Pentium) 03/22/93...
**82497/492   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**82498/493   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**
**Later chipsets (basic spec):
**440 series:...
**450NX  (?)            06/29/98:...
**?????  (Profusion)    c:99...
**800 series...
*Headland/G2...
**GCK113        80386 AT Compatible Chip Set                   c:oct89
***Info:...
***Configurations:...
***Features:...
**GCK181        Universal PS/2 Chip Set                        c:Mar89...
**HT11          Single 286 AT Chip [no datasheet]               <Aug90
***Notes:...
**HT12/+/A      Single 286 AT Chip with EMS support            c:Aug90...
**HT18          80386SX Single Chip                            c:Sep91...
**HT21          386SX/286 Single Chip (20 MHz)                 c:Aug91...
**HT22          386SX/286 Single Chip (25 MHz)                 c:Sep91...
**HT25          3-volt Core Logic for 386SX                    c:Dec92...
**HT35          Single-Chip Peripheral Controller [partial info]     ?...
**HTK320        386DX Chip Set                                 c:Sep91...
**HTK340        "Shasta" 486 Chip Set                          c:Jun92
***Notes:...
***Info:...
***Configurations:...
***Features:
o   Support for 486SX/DX/DX2 CPU
o   2 - 184 pin PQFP devices
o   Local bus interface
o   16, 20, 25 and 33MHz CPU speeds
o   Fully static operation
o   Weitek 4167 supported
o   System and Video BIOS on single ROM
o   Uses 0.7 Micron HCMOS process
ISA Controller
o   AT Compatible
o   Synchronized 8MHz ISA bus
o   Posted backplane memory writes
o   10 or 16 bit l/O mapping
o   Integrated 82375, 82593 and 8254 functionality
o   Fast gate A20/Fast reset
Write Buffer
o   4 deep on-chip buffer
o   Byte gathering
o   Out of order operation
o   Full or partial write buffer hits
DRAM Controller
o   Line burst capability from DRAM to 80486
o   256K/1M/4M/16M DRAMs
o   Mixed memory types
o   EMS 4.0
o   Hidden refresh operation
o   256MB Maximum system memory
o   Staggered refresh
o   Shadowing in 16KB increments between 640KB and 1MB
o   Remapping
o   Fast paging
o   2 or 4 way interleaving

**Support Chips:
**HT44          Secondary Cache                                c:Jun92...
**Other:...
*HMC (Hulon Microelectronics)...
*Logicstar...
*Motorola...
*OPTi...
*PC CHIPS/Amptron/Atrend/ECS/Elpina/etc...
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*Symphony...
*TI (Texas Instruments)...
*UMC...
*Unresearched:...
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*ZyMOS...
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