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**82495DX/490DX DX CPU-Cache Chip Set <Sep91
***Notes:...
***Info:...
***Configurations:...
***Features:...
**82495XP/490XP Cache Controller / Cache RAM (for i860) 06/05/91...
**82496/491 Cache Controller / Cache RAM (for P5 Pentium) 03/22/93...
**82497/492 Cache Controller / Cache RAM (for P54 Pentium) <Nov94...
**82498/493 Cache Controller / Cache RAM (for P54 Pentium) <Nov94...
**
**Later chipsets (basic spec):
**440 series:...
**450NX (?) 06/29/98:...
**????? (Profusion) c:99
Chips:
Memory Access Controller (MAC)
Data Interface Buffer (DIB)
CPUs: 8x P-III Xeon Oct
DRAM Types: SDRAM PC100 2-way Interleave dual channel
Max Mem: 32GB
ECC/Parity: ECC
AGP speed: N/A
Bus Speed: 100
PCI Clock/Bus: 1/3 PCI-66/64
**800 series...
*Headland/G2...
**HTK340 "Shasta" 486 Chip Set c:Jun92
***Notes:...
***Info:...
***Configurations:...
***Features:...
**Support Chips:
**HT44 Secondary Cache c:Jun92...
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*UMC...
**UM82C206 Integrated Peripheral Controller <91
***Info:...
***Versions:...
***Features:
o Fully compatible with PC/AT architecture
o Fully compatible with 8237 DMA controller, 8259 Interrupt
controller, 8254 Timer/Counter, and 146818 Real Time Clock
o Provides 7 DMA channels, 13 Interrupt request channels, 2 Timer/
Counter channels, and a Real Time Clock
o Built in 74LS612 memory mapper for DMA page address
o Provides 114 bytes of CMOS RAM memory
o 8 MHz DMA clock with programmable internal divider for 4 MHz
operation
o 16M bytes DMA address space
o Programmable wait states for the DMA cycle
o Reduced recovery time (120 ns) between I/O operations
**UM82c45x Serial/Parallel chips ?...
**Other chips:...
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