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**82396SX     Smart Cache                                     12/17/90
***Notes:
date source: TimelineDateSort7_05.pdf.

Information taken from: 82396SX.pdf (September '92)

***Info:...
***Versions:...
***Features:...
**82485       Turbo Cache (and 485Turbocache)                      c90...
**82489DX       Advanced Programmable Interrupt Controller    10/12/92...
**82495DX/490DX DX CPU-Cache Chip Set                           <Sep91...
**82495XP/490XP Cache Controller / Cache RAM (for i860)       06/05/91...
**82496/491     Cache Controller / Cache RAM (for P5 Pentium) 03/22/93
***Notes:...
***Info:...
***Configurations:...
***Features:...
**82497/492   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**82498/493   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**
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**450NX  (?)            06/29/98:...
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**VT82C505     Pentium/486 VL to PCI Bridge                  <05/30/94
***Info:
The  VT82C505 is  a VL  to  PCI bus  bridge that  extends a  currently
matured and  cost-effective VL/ISA chip  set to a  complete PCI/VL/ISA
system. In particular, the VT82C505  can be combined with the VT82C486
or VT82C496G for a two chip  Green PC ready PCI/VL/ISA system based on
80486SX/DX/DX2/DX4   or   compatible   processors  (Figure   1)   [see
datasheet].   Similarly,  the  VT82C505   can  be  combined  with  the
VT82C530MV chip set  (VT82C535MV and VT82C531MV) for a  Green PC ready
PCI/VL/ISA system  based on the  Pentium/P54C/M1 superscalar processor
(Figure  2)[see  datasheet].  In  all  cases,  the  system  management
interface, power  management unit, keyboard controller  with PS2 mouse
interface, clock stop mechanism and write-back level-one cache support
are fully integrated into the chip set.
***Versions:...
***Features:...
**VT82C586/A/B PCI Integrated Peripheral Controller          <10/13/96...
**VT82C596/A   Mobile PCI Integrated Peripheral Controller   <11/05/97...
**VT82C686A/B  PCI Super-I/O Integrated Peripheral Ctrl.     <02/10/98...
**Later P-Pro/II/III/Celeron...
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