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**Who made the first chip set?
By the  criteria of (2.)  in  'Definition of a chip  set' many sources
state this  to be the  Chips and Technologies  NEAT chip set.  I don't
know why this is stated as it is most definitely incorrect. The CS8221
NEW   Enhanced  AT   (NEAT)  chip   set  consisting   of  the   chips;
82C211/82C212/82C215/82C206  was  as far  as  I  can establish,  first
released sometime in 1986. 

C&T itself have an earlier chip set called the CS8220 PC/AT compatible
Chip  Set,  and  consists   of  the  following  chips;  82C201/82C202/
82A203/82A204/82A205.  It was  first  available  in OCT-85.  (see:C&T>
CS8220>Notes for further info.)

That is, AFAIK, the first motherboard  chip set from C&T and AFAIK the
worlds first chip set that meets the criteria of (2.). However C&T did
already have on the market their  popular EGA chip set, but that isn't
a motherboard chip set.

By the criteria of (1.), IBM, or Intel, see IBM>PC/XT chip set.

Another pre-'86 chipset is the  Faraday FE2010. The datasheet includes
a schematic on the very last  page dated 11/22/85. This only indicates
the chip set was on paper at that date. An acutal release date has not
been found.

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**A note on VESA support of 486 chipsets....
**Datasheets:...
*_IBM...
*ACC Micro...
*ALD...
*ALi...
*AMD . . . . . . . [no datasheets, some info]...
*Chips & Technologies...
*Contaq  . . . . . [no datasheets, some info]...
*Efar Microsystems [no datasheets, some info]...
*ETEQ...
*Faraday...
*Forex . . . . . . [List only, no datasheets found]...
*Intel...
**82496/491     Cache Controller / Cache RAM (for P5 Pentium) 03/22/93
***Notes:...
***Info:...
***Configurations:...
***Features:...
**82497/492   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**82498/493   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**
**Later chipsets (basic spec):
**440 series:...
**450NX  (?)            06/29/98:...
**?????  (Profusion)    c:99...
**800 series...
*Headland/G2...
*HMC (Hulon Microelectronics)...
*Logicstar...
*Motorola...
*OPTi...
*PC CHIPS/Amptron/Atrend/ECS/Elpina/etc...
*SIS...
**5595       Pentium PCI System I/O                          <12/24/97
***Notes:...
***Info:...
***Versions:...
***Features:
o   Integrated PCI-to-ISA Bridge
    − Translate s  PCI Bus Cycles into ISA Bus Cycles.   
    − Translate s ISA Master or DMA Cycles into PCI Bus Cycles.
    − Provide s a Dword Post Buffer for PCI to ISA Memory cycles.
    − Two 32 bit Prefetch/Post Buffers Enhance the DMA and ISA 
      Master Performance.
    − Fully Compliant to PCI 2.1.
o   Supports both Desktop and Mobile Advanced Power Management Logic
    − Meets ACPI 1.0 Requirements.
    − Supports Both ACPI and Legacy PMU.
    − Supports Suspend to RAM.
    − Supports Suspend to Hard Disk.
    − Optionally Tri−state ISA bus in low power state.
    − Supports Battery Management and LB/LLB/AC Indicator.
    − Supports CPU's SMM Mode Interface.
    − Supports CPU Stop Clock.
    − Supports Power Button of ACPI.
    − Supports three system timers and SMI# watchdog timer.
    − Supports Automatic Power Control.
    − Supports Modem Ring−in, RTC Alarm Wake up.
    − Supports Thermal Detection.
    − Supports GPIOs, and GPOs for External Devices Control.
    − Supports Programmable Chip Select.
    − Supports PCI Bus Power Management Interface Spec. 1.0
    − Supports Pentium II Sleep State.
o   Enhanced DMA Functions
    − 8-, 16- bit DMA Data Transfer.
    − Two 8237A Compatible DMA Controllers with Seven Independent
      Programmable Channels.
    − Provide the Readability of the two 8237 Associated Registers.
    − Support Distributed DMA.
    − Support PC/PCI DMA.
    − Per DMA channel programmable in legacy, DDMA or PC/PCI DMA mode
      operation.
o   Integrated Two 8259A Interrupt Controllers
    − 14 Independently Programmable Channels for Level-  or Edge-
      triggered Interrupts.
    − Provide the Readability of the two 8259A Associated Registers.
    − Support Serial IRQ.
    − Support the Reroutability for the PCI Interrupts.
o   Three  Programmable 16-bit Counters compatible with 8254
    − System Timer Interrupt.
    − Generate Refresh Request.
    − Speaker Tone Output.
    − Provide the Readability of the 8254 Associated Registers.
o   Integrated Keyboard Controller
    − Hardwired Logic Provides Instant Response.
    − Supports PS/2 Mouse Interface.
    − Supports Keyboard Password Security or Hot Key Power On 
      Function.
    − Supports Hot Key "Sleep" Function.
    − Programmable Enable and Disable for Keyboard Controller and 
      PS/2 Mouse.
o   Integrated Real Time Clock(RTC) with 256B CMOS SRAM
    − Supports ACPI Day of Month Alarm/Month  Alarm.
    − Supports various Power Up events, such as Button Up, Alarm Up, 
      Ring Up, GPIO5/PME0# Up, GPIO10/ PME1# Up, Password Security Up, 
      and Hotkey Up.
    − Supports various Power Down Events, like Software Power-down, 
      Button Power-down, and ACPI S3 Power-down.
    − Supports Power Supply ’98.
    − Provides RTC year 2000 solution.
o   Integrated Frequency Ratio Control Logic for Pentium II CPU
o   Universal Serial Bus Host Controller
    − Open HCI Host Controller with Root Hub.
    − Two USB Ports.
    − Supports Legacy Devices.
    − Supports Over Current Detection.
o   Integrated Hardware Monitor Logic
    − Up to 5 Positive Voltage Monitoring Inputs.
    − Two Fan Speed Monitoring Inputs.
    − One Temperature Sensings.
    − Supports thermister- or diode- temperature sensing for Pentium 
      II CPU.
    − Threshold Comparison of all Monitored  Values.
o   Supports I2C Serial Bus/ SMBUS 
o   Supports 2MB Flash ROM Interface
o   208  pins PQFP Package
o   5V CMOS Technology

**950        LPC I/O                                         <07/16/99...
**Other:...
**PII/III/Pro...
**Athlon etc...
*Symphony...
*TI (Texas Instruments)...
*UMC...
*Unresearched:...
*VIA...
*VLSI...
*Western Digital...
*Winbond...
*ZyMOS...
*General Sources:...