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**82396SX Smart Cache 12/17/90
***Notes:...
***Info:...
***Versions:...
***Features:...
**82485 Turbo Cache (and 485Turbocache) c90...
**82489DX Advanced Programmable Interrupt Controller 10/12/92
***Notes:...
***Info:...
***Versions:...
***Features:...
**82495DX/490DX DX CPU-Cache Chip Set <Sep91...
**82495XP/490XP Cache Controller / Cache RAM (for i860) 06/05/91...
**82496/491 Cache Controller / Cache RAM (for P5 Pentium) 03/22/93
***Notes:...
***Info:...
***Configurations:...
***Features:
o High Performance Second Level Cache
- Zero Walt States at 66 MHz
- Two-way Set Associative
- Write-Back with MESI Protocol
- Concurrent CPU Bus and Memory Bus Operation
- Boundary Scan
o Pentium Processor
- Chip Set Version of Pentium Processor
- Superscalar Architecture
- Enhanced Floating Point
- On-chip SK Code and SK Data Caches
- See Pentium Processor User's Manual Volume 2 for more
Information
o Highly Flexible
- 256K to 512K with parity
- 32, 64, or 128-Bit Wide Memory Bus
- Synchronous, Asynchronous, and Strobed Memory Bus Operation
- Selectable Bus Widths, Line Sizes, Transfers, and Burst Orders
o Full Multiprocessing Support
- Concurrent CPU, Memory Bus, and Snoop Operations
- Complete MESI Protocol
- Internal/External Parity Generation/Checking
- Supports Read-for Ownership, Write-Allocation, and Cache-to-
Cache Transfers
**82497/492 Cache Controller / Cache RAM (for P54 Pentium) <Nov94...
**82498/493 Cache Controller / Cache RAM (for P54 Pentium) <Nov94...
**
**Later chipsets (basic spec):
**440 series:
***440FX (Natoma) 05/06/96...
***440LX (Balboa) 08/27/97...
***440BX (Seattle) c:Apr'98...
***440DX (?) c:?...
***440EX (?) c:Apr'98...
***440GX (Marlinespike) 06/29/98...
***440ZX & 440ZX-66 (?) 01/04/99...
***440ZX-M (?) 05/17/99...
***440MX (Banister) 05/17/99...
**450NX (?) 06/29/98:...
**????? (Profusion) c:99...
**800 series...
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