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**82380       32-bit DMA Controller w/ Integrated Peripherals 02/01/87
***Notes:...
***Info: ...
***Versions:...
***Features:...
**82380FB/AB  PCIset: 82380FB Mobile PCI-to-PCI Bridge(MPCI2) 02/17/97...
**82384       Clock Generator and Reset Interface                  c86...
**82385       32-bit Cache Controller for 80386               09/29/87...
**82385SX     32-bit Cache Controller for 80386SX             01/25/89...
**82395DX     High Performance Smart Cache                    06/18/90...
**82395SX     Smart Cache                                     12/17/90
***Notes:...
**82396SX     Smart Cache                                     12/17/90...
**82485       Turbo Cache (and 485Turbocache)                      c90...
**82489DX       Advanced Programmable Interrupt Controller    10/12/92...
**82495DX/490DX DX CPU-Cache Chip Set                           <Sep91
***Notes:...
***Info:...
***Configurations:...
***Features:...
**82495XP/490XP Cache Controller / Cache RAM (for i860)       06/05/91...
**82496/491     Cache Controller / Cache RAM (for P5 Pentium) 03/22/93...
**82497/492   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**82498/493   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**
**Later chipsets (basic spec):
**440 series:...
**450NX  (?)            06/29/98:...
**?????  (Profusion)    c:99...
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**TACT82S411  Snake+ Single-Chip AT Controller [no datasheet]      c91
***Notes:
from: 
http://www.cbronline.com/news/ti_announces_the_tact82s411_chip_implementation/

"Texas Instruments Inc has announced the TACT82S411, a new single chip
implementation of all the support  circuitry surrounding the CPU in an
AT-alike, operating at  up to 20MHz for 80286  and 80386SX laptops and
notebooks:  the  new  chip   will  integrate  system  logic  and  most
peripheral  functions,  including   interrupt  controller,  timer  and
real-time clock, so that only  seven logic devices, as well as memory,
processor  and math  co-processor are  needed  on a  80286 or  80386SX
motherboard;  the  chip  features  128-byte  CMOS  configuration  RAM,
two-way and  four-way page interleave  mode with 64Kb, 256Kb,  1Mb and
4Mb dynamic  RAM, and support for  up to 32Mb  memory; sampling starts
this month, with volume in the fourth quarter. "

**TACT83000   AT 'Tiger' Chip Set (386)                            c89...
**TACT84500   AT Chip Set (486, EISA) [no datasheet, some info]    c91...
**Other:...
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