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**93C488         5x86/486 Single Chip PCI controller            <Aug96
***Info:...
***Configurations:...
***Features:
o   Support processor bus up to 50MHz.
    - AMD 5x86-133, 486DX4-120/100, 486DX2-80/66, 486DX-50/40/33/25
    - Cyrix/IBM/ST 5x86-120/100, 486DX4-120/100, 486DX2-80/66/50, 
      486DX-40/33/25
    - TI 486DX4-100, 486DX2-80/66
    - Intel 486DX4-100/75, 486DX2-66, 486DX-40/33/25, 486SX
o   Integrated DRAM controller
    - 1Mbyte to 256Mbyte main memory
    - Non-page mode, Fast page mode, Nibble mode, Write per bit mode, 
      EDO mode DRAM providing flexible timing control
    - Supports for auto detection of memory type including size, 
      refresh cycle.
    - 4 RAS lines for 4 DRAM banks
    - Supports for symmetrical and asymmetrical DRAM addressing
    - Supports RAS only, CBR hidden refresh
    - Supports shadow memory and 384K relocated memory
o   Integrated synchronous cache controller
    - 128Kbyte to 1Mbyte cache
    - Support pipeline/non-pipeline burst SSRAM
    - Support X,1,1,1/X,2,2,2 burst cycle
o   Fast IDE interface
    - Supports up to PIO mode 4 Timings
    - Separate master/slave IDE mode support
    - Supports primary/secondary port address swapping
o   PCI bus controller
    - 4 level host to PCI write buffer
    - Supports host to PCI byte merging
    - Supports two PCI bus master
o   Integrated IPC includes
    - Two 8259 interrupt controllers
    - Two 8237 DMA controllers
    - One 8254 timer/counter
    - RTC
    - Keyboard controller
o   Power management
    - Programmable hardware events
    - Programmable CPU clock control (STPCLK#)
    - Slow down system clock speed (SLOWDWN#)
o   Single chip 208 pin QFP

*ALi...
*AMD . . . . . . . [no datasheets, some info]...
*Chips & Technologies...
*Contaq  . . . . . [no datasheets, some info]...
*Efar Microsystems [no datasheets, some info]...
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*Forex . . . . . . [List only, no datasheets found]...
*Intel...
**450NX  (?)            06/29/98:
Chips:
[82454NX] (PXB) [82453NX] (MUX) 
[82452NX] (RCG) [82451NX] (MIOC) 
[82371EB] (PIIX4E),                            
CPUs:          Single/Dual/Quad P-II Xeon/P-III Xeon
DRAM Types:    FPM EDO 2-way Interleave 4-way Interleave
Mem Rows:      8
DRAM Density:  16Mbit 64Mbit
Max Mem:       8GB
ECC/Parity:    Both
AGP speed:     N/A
Bus Speed:     100
PCI Clock/Bus: 1/3


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**TACT82S411  Snake+ Single-Chip AT Controller [no datasheet]      c91
***Notes:...
**TACT83000   AT 'Tiger' Chip Set (386)                            c89...
**TACT84500   AT Chip Set (486, EISA) [no datasheet, some info]    c91...
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