[Home] [This version is outdated, a new version is here]
*Title...
*Search:...
*Read Me/FAQ/General Info...
**What's not included:
All  information included  in  this  file can  be  referenced to  some
document or  picture.  Or at least  should be:-) As a  result of this,
proprietary chip sets, and odd combinations of different chip sets are
not  usually  included.   There  tends  to  be  scant  information  on
proprietary chip sets, i.e.  no  datasheet.  Similarly chip sets built
using some components  from one manufacture and some  from another are
kind of difficult to deal with.

An example  I know of  is a  25 MHz 386  DX motherboard that  uses the
Intel N82230/N82231  (formerly, ZyMOS)  286 chip  set, with  an AUStek
cache Controller.   I know it  existed but there is  no documentation.
So the best I can say you'll have  to take my word that it existed.  I
can't include it because there is no real information there.

Also  not  included  is  anything  that  isn't  a  PC-compatible  chip
set.  I.e.  no Macintosh  info.  Any Information  on PC-incompatibles/
pseudo-compatibles, and  other weirdi-type  stuff I have  a particular
interest in.  See  the section: 'Info needed on'.  Some information on
video  chip  sets  is  included,  occasionally but  the  focus  is  on
motherboard implementation.

**Who made the first chip set?...
**Spelling errors/mistyped words...
**Info needed on:...
**A note on VESA support of 486 chipsets....
**Datasheets:...
*_IBM...
*ACC Micro...
*ALD...
*ALi...
*AMD . . . . . . . [no datasheets, some info]...
*Chips & Technologies...
*Contaq  . . . . . [no datasheets, some info]...
*Efar Microsystems [no datasheets, some info]...
*ETEQ...
*Faraday...
*Forex . . . . . . [List only, no datasheets found]...
*Intel...
**82485       Turbo Cache (and 485Turbocache)                      c90
***Notes:...
***Info:
The 82485 is  a second-level cache controller designed  to improve the
performance  of  Intel486  Microprocessor  systems.  One  82485  cache
controller supports  64K or  128K bytes of  second level  cache memory
that maps  to the  entire 4 Gigabytes  of the  Intel486 microprocessor
address space. The controller  is completely software transparent. One
controller plus SRAMs  provides a 64K or a  128K cache. External EPROM
can  be  cached  yet  remain  write protected.   The  82485  is  fully
compatible  with the  Intel486  microprocessor. All  Intel486 CPU  bus
cycles and timings are supported.

A complete, optional second level  cache controller using the 82485 is
available  as the 485Turbocache  Module from  Intel (data  sheet order
number 240722).

2.0 FUNCTIONAL DESCRIPTION
2.1 Introduction
The 82485 is a single ported, two-way set associative cache controller
designed specifically  to interface with  the Intel486 microprocessor.
The controller supports either a sectored configuration (two lines per
tag) or  a non-sectored configuration  (one line per tag).   The 82485
will directly support a nonsectored  64K data cache or a 128K sectored
data cache.  Both the 64K and  128K configurations are able to map the
entire 4 gigabytes of  the Intel486 microprocessor address space.  The
82485 interfaces directly to  the Intel486 microprocessor.  All Intel-
486 CPU bus cycles and timings are supported.  The 82485 also supports
0 wait  state processor operation  when there is  a cache hit  and has
provisions to support invalidation cycles, BOFF# cycles, and premature
BLAST# terminations.  The controller  is look aside (monitors bus act-
ivity in parallel to the processor) and write through (all writes pro-
pagate to the  system bus), so it supports  the same cache consistency
mechanisms as the  Intel486 CPU.  The controller also  provides a safe
method to cache ROM BIOS through the  use of a write protect pin and a
write protect strapping option.

The data cache  (Static RAM) resides external to  the 82485. The 82485
provides all  controls for  the SRAMs.  No  external latches  or tran-
ceivers are  required.  The 82485  output buffers support up  to eight
SRAMs.  A  64K cache can be  designed with only  five components; nine
components for a 128K cache.  Two-way set associativity is provided by
dual banked SRAMs. Data parity is supported.

The  82485  can  be  used  to  design  a  custom  second  level  cache
configuration. For an easier system design and higher integration, the
82485M Turbocache  can be used  (see data sheet order  number 240722).
This  module is  a  complete second  level  cache in  one package.  It
consists  of a single  82485 cache  controller and  SRAM to  provide a
complete 64K or 128K second level Intel486 microprocessor second level
cache.

***Versions:...
***Features:...
**82489DX       Advanced Programmable Interrupt Controller    10/12/92...
**82495DX/490DX DX CPU-Cache Chip Set                           <Sep91...
**82495XP/490XP Cache Controller / Cache RAM (for i860)       06/05/91...
**82496/491     Cache Controller / Cache RAM (for P5 Pentium) 03/22/93...
**82497/492   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**82498/493   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**
**Later chipsets (basic spec):
**440 series:...
**450NX  (?)            06/29/98:...
**?????  (Profusion)    c:99...
**800 series...
*Headland/G2...
*HMC (Hulon Microelectronics)...
*Logicstar...
*Motorola...
*OPTi...
**82C596/597     PTMAWB Pentium Adaptive Write-back (Cobra)       c:93
***Notes::...
***Info:...
***Configurations:...
***Features:...
**82C650/1/2     Discovery (Pentium Pro) [no datasheet]              ?...
**82C681/2/6/7   386/486WB EISA                                   c:92...
**82C683         386/486AWB EISA [no datasheet]                      ?...
**82C693/6/7     Pentium uP Write Back Cache EISA                 c:93...
**82C700         FireStar                                         c:97...
**82C701         FireStar Plus                                    c:97...
**82C750         Vendetta      [no datasheet]                        ?...
**82c801         SCWB2 DX Single Chip Solution                    c:92...
**82C802         SCWB2 PC/AT Single Chip [no datasheet]              ?...
**82C802G/GP     System/Power Management Controller (cached)      c:93...
**82C895         System/Power Management Controller (cached)   c:Sep94...
**82C898         System/Power Management Controller (non-cache)c:Nov94...
**
**Support Chips:
**82C601/2       Buffer Devices                                 <Nov94...
**82C822         PCIB (VLB-to-PCI bridge)                         c:94...
**Other:...
*PC CHIPS/Amptron/Atrend/ECS/Elpina/etc...
*SIS...
*Symphony...
*TI (Texas Instruments)...
*UMC...
*Unresearched:...
*VIA...
*VLSI...
*Western Digital...
*Winbond...
*ZyMOS...
*General Sources:...

(c) Copyright mR_Slugs Warehouse - All rights Reserved