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**M????          Genie, Quad Pentium  [no datasheet, some info]    c95
***Notes:...
**M1451/49       Aladdin    (Pentium) [no datasheet]                 ?...
**M1511/12/13    Aladdin II (Pentium) [no datasheet, some info] >Apr95...
**M1521/23       Aladdin III       50-66MHz                     <Nov96...
**M1531/33/43    Aladdin IV & IV+  50-83.3MHz                <05/28/97...
**M1541/42/33/43 Aladdin V & V+    50-100MHz                         ?...
**M1561/43/35D   Aladdin 7 ArtX    [no datasheet, some info]  11/08/99...
**M6117          386SX Single Chip PC                              <97...
**
**Support Chips:
**M1535/D        South Bridge                                        ?...
**
**May not exist:...
**Later Chipsets:...
**Other:...
*AMD . . . . . . . [no datasheets, some info]...
*Chips & Technologies...
*Contaq  . . . . . [no datasheets, some info]...
*Efar Microsystems [no datasheets, some info]...
*ETEQ...
*Faraday...
*Forex . . . . . . [List only, no datasheets found]...
*Intel...
**82430HX     PCIset (Pentium) HX (Triton II) (82439HX)       02/12/96
***Notes:...
***Info:...
***Configurations:...
***Features:...
**82430VX     PCIset (Pentium) VX (Triton II) (82437VX/82438) 02/12/96
***Notes:...
***Info:...
***Configurations:...
***Features:
o   Supports All 3V Pentium Processors
o   PCI 2.1 Compliant
o   Integrated DRAM Controller
    - 64-Bit Path to Memory
    - 4 MB to 128 MB of Main memory
    - EDO/Fast Page Mode DRAM Support (6-2-2-2 Reads at 66 MHz)
    - 5 RAS Lines
    - Support for Symmetrical and Asymmetrical DRAMs
    - Supports SDRAM (x-1-1-1 at 66 MHz)
    - Buffering for 3-1-1-1 Posted Writes, DWord and Burst Merging
    - Supports Mixed Memory Technologies (EDO/SPM/SDRAM)
    - Supports 3V or 5V DRAMs
    - External Buffers on MA Lines are Not Required
o   Integrated Second Level Cache Controller
    - Direct Mapped Organization
    - Supports 256-KB and 512-KB Pipelined Burst, DRAM Cache and
      Standard SRAM
    - Cache Hit Read/Write Cycle Timings at 3-1-1-1 with Burst or DRAM 
      Cache SRAM
    - Back-to-Back Read/Write Cycles at 3-1-1-1-1-1-1-1
    - Supports Write-Back
o   Fully Synchronous 25/30/33 MHz PCI Bus Interface
    - 5 PCI Bus Masters (including PIIX3)
    - Converts Back-to-Back sequential PCI Memory Writes to PCI Burst
      Writes
    - CPU-to-PCI Memory Writes Posting
    - PCI-to-DRAM Read Prefetching
    - PCI-to-DRAM Posting
    - Multi-Transaction Timer to Support Multiple Short PCI 
      Transactions
o   Shared Memory Buffer Architecture (SMBA) Support
    - Support Graphics Controller through a 2-Wire Protocol
    - Supports 1 Row of DRAM (EDO/FPM/SDRAM)
    - Enhanced Performance Features Specific to SMBA
o   Supports the Universal Serial Bus (USB)
o   208-Pin QFP System Controller (TVX), two l00-Pin QFP Data Paths
    (TDX)

**82430TX     PCIset (Pentium) TX (Triton II) (82439TX)       02/17/97...
**82450KX/GX  PCIset (Pentium Pro) KX/GX (Mars/Orion)         11/01/95...
**
**Support Chips:
**82091AA     Advanced Interface Peripheral (AIP)                  c93...
**8289        Bus Arbiter (808x)                                   c79...
**82289       Bus Arbiter for iAPX 286 Processor Family            c83...
**82258       Advanced Direct Memory Access Coprocessor(ADMA) 01/01/84...
**82335       High-Integration Interface Device For 386SX      c:Nov88...
**82360SL     I/O Subsystem                                   10/05/90...
**82370       Integrated System Peripheral (for 82376)         c:Oct88...
**82371FB/SB  PCI ISA IDE Xcelerator 82371FB/82371SB (PIIX/3) 01/31/95...
**82371MX     Mobile PCI I/O IDE Xcelerator (MPIIX)           11/01/95...
**82371AB     PCI-TO-ISA / IDE Xcelerator 82371AB (PIIX4)     02/17/97...
**82374/82375 PCI-EISA Bridge (82374EB/82375EB, 374SB/375SB)   c:Mar93...
**82378       System I/O (SIO) (82378IB and 82378ZB)           c:Mar93...
**82379AB     System I/O-APIC (SIO.A)                           <Dec94...
**82380       32-bit DMA Controller w/ Integrated Peripherals 02/01/87...
**82380FB/AB  PCIset: 82380FB Mobile PCI-to-PCI Bridge(MPCI2) 02/17/97...
**82384       Clock Generator and Reset Interface                  c86...
**82385       32-bit Cache Controller for 80386               09/29/87...
**82385SX     32-bit Cache Controller for 80386SX             01/25/89...
**82395DX     High Performance Smart Cache                    06/18/90...
**82395SX     Smart Cache                                     12/17/90
***Notes:...
**82396SX     Smart Cache                                     12/17/90...
**82485       Turbo Cache (and 485Turbocache)                      c90...
**82489DX       Advanced Programmable Interrupt Controller    10/12/92...
**82495DX/490DX DX CPU-Cache Chip Set                           <Sep91...
**82495XP/490XP Cache Controller / Cache RAM (for i860)       06/05/91...
**82496/491     Cache Controller / Cache RAM (for P5 Pentium) 03/22/93...
**82497/492   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**82498/493   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**
**Later chipsets (basic spec):
**440 series:...
**450NX  (?)            06/29/98:...
**?????  (Profusion)    c:99...
**800 series...
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*Unresearched:...
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