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**82320       MCA compatible Chipset           [no datasheet] 04/10/89
***Notes:...
**82340DX     Chip Set (VLSI) (82346/82345/82355)             01/08/90...
**82340SX     Chip Set (VLSI) (82343/82344)                   01/25/89...
**82350       EISA Chip Set                                   07/10/89...
**82350DT     EISA Chip Set                                   04/22/91...
**82420TX/ZX  PCIset (for 486) TX (Saturn), ZX (Saturn II)     c:Nov92...
**82420EX     PCIset (for 486) EX (Aries)   (82425EX/82426EX)   <Dec94...
**82430LX     PCIset (Pentium) LX (Mercury) (82433LX/82434LX) 03/22/93...
**82430NX     PCIset (Pentium) NX (Neptune) (82433NX/82434NX)    Mar94...
**82430FX     PCIset (Pentium) FX (Triton I) (82437FX/82438FX)01/31/95...
**82430MX     PCIset (Pentium) MX (Mobile Triton)(82437/438MX)11/01/95...
**82430HX     PCIset (Pentium) HX (Triton II) (82439HX)       02/12/96...
**82430VX     PCIset (Pentium) VX (Triton II) (82437VX/82438) 02/12/96...
**82430TX     PCIset (Pentium) TX (Triton II) (82439TX)       02/17/97...
**82450KX/GX  PCIset (Pentium Pro) KX/GX (Mars/Orion)         11/01/95...
**
**Support Chips:
**82091AA     Advanced Interface Peripheral (AIP)                  c93...
**8289        Bus Arbiter (808x)                                   c79...
**82289       Bus Arbiter for iAPX 286 Processor Family            c83...
**82258       Advanced Direct Memory Access Coprocessor(ADMA) 01/01/84...
**82335       High-Integration Interface Device For 386SX      c:Nov88...
**82360SL     I/O Subsystem                                   10/05/90...
**82370       Integrated System Peripheral (for 82376)         c:Oct88...
**82371FB/SB  PCI ISA IDE Xcelerator 82371FB/82371SB (PIIX/3) 01/31/95...
**82371MX     Mobile PCI I/O IDE Xcelerator (MPIIX)           11/01/95...
**82371AB     PCI-TO-ISA / IDE Xcelerator 82371AB (PIIX4)     02/17/97...
**82374/82375 PCI-EISA Bridge (82374EB/82375EB, 374SB/375SB)   c:Mar93...
**82378       System I/O (SIO) (82378IB and 82378ZB)           c:Mar93...
**82379AB     System I/O-APIC (SIO.A)                           <Dec94...
**82380       32-bit DMA Controller w/ Integrated Peripherals 02/01/87...
**82380FB/AB  PCIset: 82380FB Mobile PCI-to-PCI Bridge(MPCI2) 02/17/97...
**82384       Clock Generator and Reset Interface                  c86...
**82385       32-bit Cache Controller for 80386               09/29/87...
**82385SX     32-bit Cache Controller for 80386SX             01/25/89...
**82395DX     High Performance Smart Cache                    06/18/90...
**82395SX     Smart Cache                                     12/17/90...
**82396SX     Smart Cache                                     12/17/90...
**82485       Turbo Cache (and 485Turbocache)                      c90...
**82489DX       Advanced Programmable Interrupt Controller    10/12/92...
**82495DX/490DX DX CPU-Cache Chip Set                           <Sep91...
**82495XP/490XP Cache Controller / Cache RAM (for i860)       06/05/91
***Notes:...
***Info:...
***Features:...
**82496/491     Cache Controller / Cache RAM (for P5 Pentium) 03/22/93...
**82497/492   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**82498/493   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**
**Later chipsets (basic spec):
**440 series:...
**450NX  (?)            06/29/98:...
**?????  (Profusion)    c:99...
**800 series...
*Headland/G2...
*HMC (Hulon Microelectronics)...
*Logicstar...
*Motorola...
*OPTi...
**82C802G/GP     System/Power Management Controller (cached)      c:93
***Notes:
Green version of the 82C802.  Supports cached 486 systems running from
20 MHz to  50 MHz. Also supports write-back cache and  VESA LB. PCI is
also supported via the 82C822 bridge chip.

This  is an  amalgamation of  two different  datasheets, the  802G and
802GP. There is very little difference, see the features section.

***Info:...
***Configurations:...
***Features:
[features found only in the 802GP are marked in [] brackets ]

o   Processor interface:
    - Intel 80486SX, DX, DX2, SLe, DX4, P24T, P24D
    - AMD 486SX, DX2, DXL, DXL2, Plus
    - Cyrix DX, DX2, M7
    - CPU frequencies supported 20, 25, 33, 40 and 50MHz
o   Cache interface:
    - Direct mapped cache
    - Two banks interleaved or single bank non-interleaved
    - 64, 128, 256 and 512K cache sizes
    - Programmable wait states for L2 cache reads and writes
    - 2-1-1-1 read burst and zero wait state write @ 33MHz
    - No Valid bit required
   [- Supports external single-chip cache modules from thyroid-party ]
   [  vendors for high performance at 50MHz                          ]
    - Supports CPUs with L1 write-back support
o   DRAM interface:
    - Up to 128MB main memory support
    - Supports 256KB, 1MB, 4MB, and 16MB single- and double-sided SIMM 
      modules
    - Read page hit timing of 3-2-2-2 at 33MHz
    - Supports hidden, slow. and CAS-before-RAS refresh
    - Four RAS lines to support four banks of DRAM
   [- Eight RAS lines to support four banks of DRAM  ]
    - Programmable wait states for DRAM reads and writes
   [- Programmable memory holes for supporting ISA memory ]
    - Enhanced DRAM configuration map
   [- Strong drivers on the MA lines (12/24mA) ]
   [- Supports asymmetric DRAMs                ]
o   Power management:
    - Support for SMM (System Management Mode) for system power 
      management implementations
    - Programmable power management
   [- CPU clock control ]
    - Programmable wake-up events through hardware, software, and 
      external SMI source
    - Multiple level GREEN support (NESTED_GREEN)
    - STPCLK# protocol support
   [- Programmable GREEN event timer       ](802G  only)
   [- Individually programmable peripheral ](802GP only)
o   ISA interface:
    - 100% IBM PC/AT ISA compatible
   [- Programmable edge- or level-trigger interrupts ]
    - integrates DMA, timer and interrupt controllers
   [- Slew rate control for output drivers           ]
    - Optional PS/2 style IRQ1 and IRQ12 latching
o   VESA VL interface:
    - Conforms to the VESA V2.0 specification
    - Optional support for up to two VL masters
o   Miscellaneous features:                              (802G only)
    - Full support for shadow RAM, write protection, L1/L2 
      cacheability for video, adapter, and system BIOS
    - Enhanced arbitration scheme
    - Transparent 8042 emulation for fast CPU reset and GATEA20 
      generation
o  [Miscellaneous features:                             ](802GP only)
   [- Full support for flash, write protection, L1/L2   ]
   [  cacheability for video, adapter, and system BIOS  ]
   [- Provides Micro Channel bridge support             ]
   [- 10-/16-nit I/O decodes                            ]
   [- Enhanced arbitration scheme                       ]
o   Packaging:
    - Higher integration
    - Reduced TTL count
    - Low-power, high~speed 0.8-micron CMOS technology
    - 208-pin PQFP (Plastic Quad Flat Pack)

**82C895         System/Power Management Controller (cached)   c:Sep94...
**82C898         System/Power Management Controller (non-cache)c:Nov94...
**
**Support Chips:
**82C601/2       Buffer Devices                                 <Nov94...
**82C822         PCIB (VLB-to-PCI bridge)                         c:94...
**Other:...
*PC CHIPS/Amptron/Atrend/ECS/Elpina/etc...
*SIS...
*Symphony...
*TI (Texas Instruments)...
*UMC...
*Unresearched:...
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*Winbond...
*ZyMOS...
*General Sources:...

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